4位數7段顯示器移位暫存控制器VHDL20240611_door_locks (半成品)
4位數7段顯示器移位暫存控制器
能夠用莫爾機Moore做解彈跳，
個位等於指撥開關輸入(BCD)
按下set時，4位數7段顯示器往左移位
設有清除，一鍵清成0000
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;
entity VHDL20240611_door_locks is
port(
clk_4M:in std_logic;
sw_in:in std_logic_vector(3 downto 0);
set:in std_logic;
rst:in std_logic;
seg7_scan:out std_logic_vector(3 downto 0);
seg7_out:out std_logic_vector(6 downto 0);
seg7_sec:out std_logic:='1');
end VHDL20240611_door_locks;
architecture aa of VHDL20240611_door_locks is
signal cnt1:integer range 0 to 1999:=0;
signal clk_2k:std_logic:='0';
signal cnt2:std_logic_vector(1 downto 0):="00";
signal v3:std_logic_vector(3 downto 0):="0000";
signal v2:std_logic_vector(3 downto 0):="0000";
signal v1:std_logic_vector(3 downto 0):="0000";
signal v0:std_logic_vector(3 downto 0):="0000";
signal seg7_reg:std_logic_vector(3 downto 0);
type state_type is (idle, pressed);
signal state:state_type:=idle;
signal cnt3:integer range 0 to 99:=0;
begin
process(clk_4M)
begin
if rising_edge(clk_4M) then
if cnt1=1999 then
cnt1<=0;
clk_2k<= not clk_2k;
cnt2<=cnt2+1;
else
cnt1<=cnt1+1;
end if;
end if;
end process;
process(cnt2)
begin
case cnt2 is
when"00"=>
seg7_reg<=v0;
seg7_scan<="1110";
when"01"=>
seg7_reg<=v1;
seg7_scan<="1101";
when"10"=>
seg7_reg<=v2;
seg7_scan<="1011";
when"11"=>
seg7_reg<=v3;
seg7_scan<="0111";
end case;
end process;
process(clk_2k,set,rst)
begin
if rst='0' then
v3<="0000";
v2<="0000";
v1<="0000";
v0<="0000";
elsif rising_edge(clk_2k) then
case state is
when idle=>
v0<=sw_in;
if set='0' then
v3<=v2;
v2<=v1;
v1<=v0;
state<=pressed;
end if;
when pressed=>
if cnt3=99 then
cnt3<=0;
if set='1' then
state<=idle;
end if;
else
cnt3<=cnt3+1;
end if;
end case;
end if;
end process;
seg7_out<= "1000000" when seg7_reg="0000"else
"1111001" when seg7_reg="0001"else
"0100100" when seg7_reg="0010"else
"0110000" when seg7_reg="0011"else
"0011001" when seg7_reg="0100"else
"0010010" when seg7_reg="0101"else
"0000010" when seg7_reg="0110"else
"1111000" when seg7_reg="0111"else
"0000000" when seg7_reg="1000"else
"0011000" when seg7_reg="1001"else
"1111111";
end aa;
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