4 位元同步計數器VHDL20240601_SyncCounter4Bits
題目：4 位元同步計數器
設計一個 4 位元同步二進制計數器，具有上數和下數功能：
- 當
reset為高電位時，計數器重置為 0。 - 當
up_down為高電位時，計數器上數；當up_down為低電位時，計數器下數。 - 當計數器到達 15（上數）或 0（下數）時，溢出或借位，循環計數。
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;
entity VHDL20240601_SyncCounter4Bits is
port(
clk_4M:in std_logic;
reset:in std_logic;
up_down:in std_logic;
seg7_out:out std_logic_vector(6 downto 0);
seg7_scan:out std_logic_vector(3 downto 0);
seg7_sec:out std_logic:='1';
BCD:buffer std_logic_vector(3 downto 0):="0000");
end VHDL20240601_SyncCounter4Bits;
architecture aa of VHDL20240601_SyncCounter4Bits is
signal cnt1:integer range 0 to 1999999:=0;
signal clk_sec:std_logic:='0';
signal cnt2:integer range 0 to 1999:=0;
signal clk_2k:std_logic:='0';
signal cnt3:std_logic_vector(1 downto 0):="00";
signal digit0:std_logic_vector(3 downto 0);
signal digit1:std_logic_vector(3 downto 0);
signal digit2:std_logic_vector(3 downto 0):="1111";
signal digit3:std_logic_vector(3 downto 0):="1111";
signal seg7_reg:std_logic_vector(3 downto 0);
begin
process(clk_4M)
begin
if rising_edge(clk_4M) then
cnt1<=cnt1+1;
if cnt1=1999999 then
cnt1<=0;
clk_sec<=not clk_sec;
end if;
end if;
end process;
process(reset, up_down, clk_sec)
begin
if reset='0' then
BCD<="0000";
elsif rising_edge(clk_sec) then
if up_down='1' then
BCD<=BCD+1;
else
BCD<=BCD-1;
end if;
end if;
end process;
process(clk_4M)
begin
if rising_edge(clk_4M) then
cnt2<=cnt2+1;
if cnt2=1999 then
cnt2<=0;
clk_2k<=not clk_2k;
end if;
end if;
end process;
process(clk_2k)
begin
if rising_edge(clk_2k) then
cnt3<=cnt3+1;
end if;
end process;
process(BCD)
begin
if BCD>"1001" then
digit1<="0001";
digit0<=BCD-10;
else
digit1<="0000";
digit0<=BCD;
end if;
end process;
seg7_scan<= "1110" when(cnt3=0)else
"1101" when(cnt3=1)else
"1011" when(cnt3=2)else
"0111";
seg7_reg<= digit0 when(cnt3=0)else
digit1 when(cnt3=1)else
digit2 when(cnt3=2)else
digit3;
seg7_out<= "1000000" when(seg7_reg="0000")else
"1111001" when(seg7_reg="0001")else
"0100100" when(seg7_reg="0010")else
"0110000" when(seg7_reg="0011")else
"0011001" when(seg7_reg="0100")else
"0010010" when(seg7_reg="0101")else
"0000010" when(seg7_reg="0110")else
"1111000" when(seg7_reg="0111")else
"0000000" when(seg7_reg="1000")else
"0011000" when(seg7_reg="1001")else
"1111111";
end aa;
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