以莫爾機控制0~3上下數計數器VHDL20240608_counting_moore
以莫爾機控制0~3上下數計數器VHDL20240608_counting_moore
https://youtube.com/shorts/NGUJQK7pRxM
利用莫爾機完成一個0~3上下數計數器
當按下rst，計數器輸出為0
放開rst，計數器正常計數
當mode為0，為下數計數器，0, 3, 2, 1, 0
當mode為1，為上數計數器，0, 1, 2, 3, 0
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;
entity VHDL20240608_counting_moore is
port(
clk_4M:in std_logic;
rst:in std_logic;
mode:in std_logic;
BCD:out std_logic_vector(3 downto 0));
end VHDL20240608_counting_moore;
architecture aa of VHDL20240608_counting_moore is
signal cnt1:integer range 0 to 1999999:=0;
signal clk_sec:std_logic:='0';
type state_type is (s0, s1, s2, s3);
signal state: state_type:=s0;
begin
process(clk_4M)
begin
if rising_edge(clk_4M) then
if cnt1=1999999 then
cnt1<=0;
clk_sec<=not clk_sec;
else
cnt1<=cnt1+1;
end if;
end if;
end process;
process(rst,clk_sec,state,mode)
begin
if rst='0' then
state<=s0;
BCD<="0001";
elsif rising_edge(clk_sec) then
case state is
when s0=>
BCD<="0001";
if mode='1' then
state<=s1;
else
state<=s3;
end if;
when s1=>
BCD<="0010";
if mode='1' then
state<=s2;
else
state<=s0;
end if;
when s2=>
BCD<="0100";
if mode='1' then
state<=s3;
else
state<=s1;
end if;
when s3=>
BCD<="1000";
if mode='1' then
state<=s0;
else
state<=s2;
end if;
end case;
end if;
end process;
end aa;
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